LLMs can now write chip verification code faster than human engineers

A team built software that uses language models to automatically generate the test code that validates whether new computer chips work correctly — a task that consumes 70% of chip design effort and usually requires months of manual coding. The system reduces setup time by up to 75% compared to experienced engineers while maintaining the same verification rigor.

Chip verification is a genuine bottleneck in hardware development. The manual work is repetitive, expertise-dependent, and expensive — which means it slows down every new design. If this actually works in production at scale, it collapses the cost curve on one of the slowest parts of the chip pipeline. The practical question is whether teams will actually trust the AI-generated tests enough to deploy them, or whether they'll still manually rewrite everything out of caution.